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Feasibility Study of Mo/SiOx/Pt Resistive Random Access Memory in an Inverter Circuit for FPGA Applications

Journal

IEEE Elect. Dev. Lett.

Vol

32(12)

Page

P.1665

Author

S.S. Park, J.H. Shin, S. Cimino, S.J. Jung, J.M. Lee, S.H. Kim, J.B. Park, W.T. Lee, M.W. Son, B.H. Lee, L. Pantisano and H. Hwang

Year

2011

Date

2011.10.20

doi

https://doi.org/10.1109/LED.2011.2168376

File

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Link

https://doi.org/10.1109/LED.2011.2168376 140회 연결