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Electron Trap Generation in High-k Gate Stacks by Constant Voltage Stress

Journal

IEEE Trans. Dev. Mat. Reliability

Vol

6(2)

Page

123-131

Author

C.D. Young, D. Heh, S. Nadkarni, R. Choi, J.J. Peterson, J. Barnett, B. H. Lee, and G. Bersuker

Year

2006

Date

2006.08.14

doi

10.1109/TDMR.2006.877865

File

2006_TDMR_CDYOUNG.pdf (2.5M) 0회 다운로드 DATE : 2021-04-01 21:46:38

Link

http://10.1109/TDMR.2006.877865 74회 연결