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    • Trade-off Between Hot Carrier and Negative Bias Temperature Degradations in High Performance Si1-xGe1-x pMOSFETs with High-k/Metal Gate Stacks
    Journal
    IEEE Electron Device Lett.
    Vol
    31(11)
    Page
    1211-1213
    Author
    W.H. Choi, C.-Y. Kang, J.-W. Oh, B.H. Lee, P. Majhi, H.M. Kwon, R. Jammy, G.W. Lee and H.D. Lee
    Year
    2010
    Date
    2010.10.07
    doi
    10.1109/LED.2010.2071851
    File
    2010_EDL_WHCHOI.pdf (435.6K) 0회 다운로드 DATE : 2021-04-02 13:58:16