Kim, Kiyung (K.Kim)

Ph.D Course

82-54-279-5422

Education

2021 – present : Ph.D Course, Electrical Engineering, POSTECH

2019 – 2021 : Ph.D Course, Dept. of Material Science and Engineering, Gwangju Institute of Science and Technology (GIST)

2017 – 2019 : M.S. Course, Dept. of Material Science and Engineering, Gwangju Institute of Science and Technology (GIST)

2012 – 2017 : B.S., Electronic Engineering and Computer Science Concentration, Gwangju Institute of Science and Technology (GIST)

Award

현장우수포스터상, 한국반도체학술대회(KCS), 2022.

Best poster award, Nano Convergence Conference (NCC), 2019.

Best poster award, Int. Conf. on Electronic Materials and Nanotechnology for Green Environment (ENGE), 2018.


Publication

Journals

S.Y.Kim, K.Y.Kim, A.R Kim, H.I.Lee, Y.S. Lee, S.M.Kim, H.W.Lee, H.J.Hwang and B.H. Lee*, "Operation principles of ZnO/Al2O3-AlDMP/ZnO channel ternary thin film transistor," Submitted to Science Advances (2021).


H.I.Lee, J.S.Park,Y.J.Kim, S.W.Heo, J.W.Hwang, S.M.Kim, K.Kim, Y.S.Lee, J.W.Jung, H.B.Kim, K.J.Cho, M.M.Sung, B.H.Lee*, "Dynamic band alignment modulation of ultrathin WOx/ZnO stack for high on-off ratio field-effect switching applications,”  Nanoscale 12(32), p.16755(2020).


S.Y.Kim, J.A. Ryou, M.J. Kim, K.Y.Kim, Y.S.Lee, S.M.Kim. H.J.Hwang, Y.H.Kim, B.H.Lee*, "Performance degradation in graphene-ZnO barristors due to graphene edge contact," ACS Applied Materials and Interfaces 12(25), pp.28768-28774 (2020).


S.C.Kang, S.Y.Kim, S.K.Lee, K.Y.Kim, B. Allouche, H.J.Hwang, and B.H. Lee*, "Channel defect profiling and passivation for ZnO thin film transistors," Nanomaterials 10(6), pp.1-8 (2020).


N.S.Lim, Y.S.Park, J.K. Kim, T.J.Yoo, H.H. Kim, Y. Kumaresan, W.C.Kim, S.J. Cho, S.C.Kwon, B.H.Lee, T.H.Lee, G.Y.Jung, "Enhanced Photo-response of MoS₂ Photodetectors by a Laterally Aligned SiO₂ Nanoribbon Array Substrate,” ChemNanoMat, 5(10), 1272-1279, (2019).


S.W. Heo, S.M. Kim, K.Y. Kim, H.J. Lee, S.Y. Kim, Y.J. Kim, S.M. Kim, H.I. Lee, S.G. Lee, K.R. Kim, S.H. Kang, B.H. Lee*, "Ternary full adder using multi-threshold graphene barristor," IEEE Electron Device Letters 39(12), p.1948 (2018).


S.W.Heo, H.I.Lee, H.J. Lee, S.M. Kim, K.Y. Kim, Y.J. Kim, S.Y.Kim, J.H.Kim, M.H. Yoon, B.H.Lee*, “Very low-temperature integrated complementary graphene barristor based inverter for thin film transistor applications," Annalen der Physik ,530(10), p.1800224 (2018).


S. Seo, H. Choi, S.Y. Kim, J. Lee, K. Kim, S. Yoon, B.H. Lee, S. Lee , “Growth of centimeter-scale monolayer and Few-layer WSe2 thin films on SiO2/Si substrates via pulsed laser deposition," Advanced Materials Interfaces 5(20), p.1800524(2018).


J.S. Song, M.J. Seo, T.H. Lee, Y.R. Jo, J.M. Lee, T.M. Kim, S.-Y. Kim, S.M. Kim, S.Y. Jeong, H.J. An, S.K. Kim, B.H. Lee, D.H. Lee, H.W. Jang, B.J. Kim, S.H. Lee, “ Tailoring crystallographic orientations to substantially enhance charge separation efficiency in anisotropic BiVO4 photoanodes,” ACS Catalysis, 8(7), p. 5952 (2018).


D.H.Kim, S.K.Lim, B.Y.Bae, C.K.Kim, S.W.Lee, M.S.Seo, S.Y.Kim, K.M.Hwang, G.B.Lee, B.H. Lee. Y.G.Choi, “Quantitative Analysis of Deuterium Annealing Effect on Poly-Si TFTs  by Low Frequency Noise and DC I-V Characterization," IEEE Trans. on Electron Device 65(4), p. 1640 (2018).


M.W.Son, Y.Park, S.S.Chee, F.M.Auxilia, K.H.Kim, B.K.Lee, S.G.Lee, S.K.Kang, C.D.Lee, J.S.Lee, K.K.Kim, Y.H.Jang, B.H.Lee, G.Y.Jung, M.H.Ham, “Charge transfer in graphene/polymer interfaces for CO2 detection," Nano Research 11(7), pp.3529-3536(2017).


C.K.Park, H.J.Kim, K.Y.Ko, K.K.Kim, B.H.Lee, J.H.Ahn, "The variation of the enhanced PL efficiency of Y2O3:Eu3+ phosphor films with the height to the ZrO2 nanoparticle-assisted 2D PCL by reverse nano-imprint lithography," Microelectronic Engineering, v.136, p.48-50, 2015.


G. Cha, B. H. Lee, K. W. Lee, G. J. Bae, W. D. Kim, J. H. Lee, I. K. Kim, K. C. Park, S. I. Lee and Y. B. Koh, "Design Considerations for Patterned Wafer Bonding,” Jpn. J. Appl. Phys., 36, p.1912-1916, (1997)

Conferences

K.Y.Kim, Y.S.Lee, H.W.Lee, H.J.Kwon and B.H.Lee*, “Study on the VDD scalability of complementary ternary logic circuit using stack channel ternary thin film transistor”, NANO KOREA, (2022).


H.J.Kwon, Y.S.Lee, H.I.Lee, K.Y.Kim, H.W.Lee, M.J.Kim, J.H.Jun, H.J.Hwang and B.H.Lee*, “Optimization of DNTT-based thin film transistor and its ternary application”, NANO KOREA, (2022).


김기영, 김소영, 이용수, 황현준, 이병훈, "Stack channel ternary TFT의 모델 개발과 응용 시뮬레이션", The 29th Korean Conference of Semiconductors (KCS), (2022)


이용수, 김승모, 김기영, 김소영, 이호인, 권희진, 이해원, 황현준, 이병훈, "전류 증폭/억제를 이용한 이중 채널 P형 삼진 소자", The 29th Korean Conference of Semiconductors (KCS), (2022)


S.Y.Kim, S.R.Lee, S.M.Kim, Y.S.Lee, H.I.Lee, H.W.Lee, K.Kim, H.J.Hwang, and B.H.Lee*, "A study on the electrical characteristic of ultra-thin oxide semiconductor field-effect transistor" Int. Conf. on Electronic Materials and Nanotechnology for Green Environment (ENGE), (2020).


Kiyung Kim, Sunmean Kim, Yongsu Lee, Daeyeon Kim, So-Young Kim, Seokhyeong Kang, Byoung Hun Lee*, "Extreme Low Power Technology using Ternary Arithmetic Logic Circuits via Drastic Interconnect Length Reduction", IEEE International Symposium on Multiple-Valued Logic (ISMVL), (2020)


Y.S.Lee, H.J.Kwon, H.I.Lee, S.Y.Kim, S.M.Kim, K.Kim, H.W.Lee, H.J.Hwang and B.H.Lee*, "Electrical performance of p-type ternary logic device and its circuit application", NANO KOREA, (2020).


S.Y.Kim, K.Kim, A.R.Kim, H.I.Lee, Y.S.Lee, S.M.Kim, H.W.Lee, H.J.Hwang and B.H.Lee*, "Electrical performance of stack channel ternary logic device depending on the carrier concentration of ZnO", NANO KOREA, (2020).


이용수, 김채은, 김소영, 김시현, 이호인, 김승모, 김기영, 황현준, 이병훈, "삼진상보보완회로를 위한 그래핀 기반의 P-type 삼진 로직 소자", The 27th Korean Conference of Semiconductors (KCS), (2020)


김소영, 김소륜, 이호인, 이용수, 김기영, 이해원, 김채은, 황현준, 이병훈, "ZnO 기반 삼진 로직 소자의 중간 전류 레벨 조절 연구", The 27th Korean Conference of Semiconductors (KCS), (2020)


Kiyung Kim, So-Young Kim, Hyeon Jun Hwang, Byoung Hun Lee, "Low Device Count Ternary Full Adder Using Multi-threshold Graphene Barristor", Nano Convergence Conference (NCC), (2020) Best poster award.


S.Y.Kim, Y.Lee, C.Kim, H.I.Lee, K.Kim, H.J.Hwang, B.H.Lee, "Dual Channel Ternary Graphene Barristor with Tunable Schottky Barrier Height controlled by Chemical Doping", 50th IEEE Semiconductor Interface Specilaists Conference (SISC), (2019)


B.H.Lee, S.Y. Kim, K.Y.Kim, H.I.Lee,  S.HKang, M.M.Sung, "Recent progress towards ternary logic devices for extreme low power architecture," Presented at Semicondoutor Interface Specialist Conference, 2019. (Invited)


Yongsu Lee, Chaeeun Kim, So-Young Kim, Kiyung Kim, Seung-Mo Kim, Sunwoo Heo, Ho-In Lee, Cihyun Kim, Hyeon Jun Hwang, and Byoung Hun Lee, "Structural improvement of DNTT graphene barristor by vertical drain electrode", Nano Korea, (2019)


Chaeeun Kim, So-Young Kim, Yongsu Lee, Kiyung Kim, Byoung Hun Lee, "Contact Doping Layer for Graphene/DNTT Barristor", 2019 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), (2019)


Kiyung Kim, Sunwoo Heo, So-Young Kim, and Byoung Hun Lee, "Graphene Barristor Model for Ternary Logic Application", 2019 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), (2019)


So-Young Kim, Sunwoo Heo, Kiyung Kim, Myungwoo Son, Seung-Mo Kim, Ho-In Lee, Yongsu Lee, Hyeon Jun Hwang, Moon-Ho Ham, Byoung Hun Lee, "Demonstration of ternary devices and circuits using dual channel graphene barristors", IEEE International Symposium on Multiple-Valued Logic (ISMVL), (2019)


김채은, 김승모, 허선우, 이용수, 김기영, 김민범, 이병훈, "유기물 반도체 두께에 따른 그래핀/DNTT 배리스터의 전기적 특성 변화 분석", The 26th Korean Conference of Semiconductors (KCS), (2019)


Sunwoo Heo, Kiyung Kim, Ho-In Lee, Yongsu Lee, Seung-Mo Kim, Hyeon Jun Hwang, Byoung Hun Lee, "Graphene barristor based rectifier for dc level shift", Nano Convergence Conference (NCC), (2019) Best poster award.


김기영, 허선우, 이호인, 김승모, 김채은, 이린, 황현준, 성명모, 이병훈, "회로 설계 관전에서의 삼진 논리 소자 최적화 방향 제시", Nano Convergence Conference (NCC), (2019)


Sunwoo Heo, Kiyung Kim, Seung-Mo Kim, Ho-In Lee, Hyeji Lee, So-Young Kim, Byoung Hun Lee, "Insight for optimization of graphene barristor based devices and circuits", Int. Conf. on Electronic Materials and Nanotechnology for Green Environment (ENGE), (2018)


Kiyung Kim, Sunwoo Heo, Sunmean Kim, Seung Mo Kim, Ho-In Lee, Billal Allouche, Seokhyeong Kang, Byoung Hun Lee, "Multi-threshold graphene barristor for standard ternary inverter", Int. Conf. on Electronic Materials and Nanotechnology for Green Environment (ENGE), (2018)


Seung Mo Kim, Sunwoo Heo, Hyeji Lee, Ho In Lee, Kiyung Kim, Yun Ji Kim, So-Young Kim, Billal Allouche, and Byoung Hun Lee, “Vth control in p-type graphene barristor using a polymer doping process”, Int. Conf. on Solid State Device and Materials (SSDM), (2018)


So-Young Kim, Cihyun Kim, Ho-In Lee, Kiyung Kim, Kyoung Eun Chang, Sunwoo Heo, Byoung Hun Lee, "Effect of deposition temperature of ZnO(:N) for electrical characteristic of graphene barristor", Nano Korea, (2018).


Sunwoo Heo, Seung Mo Kim, Kyoung Eun Chang, Ho-In Lee, Kiyung Kim, Tae Jin Yoo, So-Young Kim, Yongsu Lee, Byoung Hun Lee, "Impact of charged impurities on graphene barristor", Nano Korea, (2018).


S. Y. Kim, H. J. Lee, S. M. Kim, K. Y. Kim, K. E. Chang, S. K. Lee, H. J. Hwang, S. Heo, B. H. Lee, "Device applications of chemically doped graphene," Silicon Nanoworkshop (SNW), (2018).


김기영, 허선우, 김소영, 이혜지, 김윤지, 이호인, 김승모, 이병훈, "간단한 그래핀 패턴을 이용한 저항 제작 및 특성 연구", The 25th Korean Conference on Semiconductors (KCS), (2018)


이호인, 허선우, 김시현, 김윤지, 김승모, 김기영, 이용수, 이혜지, 이병훈, "ZnO:N-그래핀 접합 배리서터의 TiO2 층 페시베이션 효과", The 25th Korean Conference on Semiconductors (KCS), (2018)


허선우, 이호인, 김기영, 이영곤, 박호경, 이석규, 김승모, 노진우, 이병훈, "DRAM의 센싱 margin 개선을 위한 MIM capacitor 의 주파수분산특성연구", The 25th Korean Conference on Semiconductors (KCS), (2018)


S. Heo, Y. J. Kim, K. J. Han, K. Y. Kim, H. I. Lee, S. M. Kim, S. K. Lee, K. E. Chang, J. H. Kim, M. H. Yoon, and B.H.Lee, “Low temperature integrated complementary graphene barristor to overcome the thermal budget in monolithic 3D integration”, 48th IEEE Semiconductor Interface Specilaists Conference (SISC), (2017)


김소영, 김민범, 김윤지, 이혜지, 김기영, 이병훈, "유기박막을 이용한 그래핀 도핑 방법 연구", Electronic Materials and Nanotechnology for Green Environment (ENGE), (2017)


허선우, 심창후, 김윤지, 김소영, 김기영, 이용수, 이상경, 이병훈, "그래핀 고정저항에 의한 그래핀/ZnO:N 배리스터의 동작특성 열화연구", The 24th Korean Conference on Semiconductors (KCS), 2017, Best poster award.


김기영, 허선우, 김윤지, 이상경, 강수철, 이병훈, "EOT Scaling of Atomic Layer Deposited HfO2 on Buried-Gate Graphene FET", The 24th Korean Conference on Semiconductors (KCS), 2017


I.K. Kim, S.I. Yu, W.T. Kang, K.H. Yeom, Y.K. Kim, J.H. Lee, K.C. Park, B. H. Lee, K.W. Lee, G.Cha, S.I. Lee, T.E.Shim and J.W . Park, "Advanced Integration Technology for a Highly Scalable SOI DRAM with SOC(Silicon-On-Capacitor)”, Tech. Dig. of IEDM, p.605, (1996).

Patents/Book

이병훈, 김기영, 김소영 "다중 문턱 전압 소자를 기반으로 하는 4진법 논리 인버터" 국내출원번호, 2019-0169058 (2019.12.17), 2019.


이병훈, 김소영, 김기영, "그래핀 반도체 접합소자" 국내출원번호, 2019-0157819 (2019.11.29), 2019.