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게시판 검색
2003
4
International
"High Performance CMOS Devices on SOI for 90 nm Technology Enhanced by RSD (Raised Source/Drain) and Thermal Cycle/Spacer Engineering"
H. Park, W. Rausch, H. Utomo, K. Matsumoto, H. Nii, S. Kawanaka, P. Fisher, S-H. Oh, J. Snare, W. Clark, A.C. Mocuta, J. Holt, R. Mo, T. Sato , D. Mocuta, B. H. Lee, O. Dokumaci, P. O’Neil, D. Brown, J. Suenaga, Y. Li, L. Brown , J. Nakos,K. Hathorn, P. R,
Tech. Dig. of Int. Electron Device Meetings,
2003.
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3
International
"W/HfO2 gate stacks with Tinv~1.2nm and low charge trapping"
Callegari, P.Jamison, B. H. Lee, D.Neumayer, V.Narayanan, S.Zafar, E.Gusev, C.D’Emic, D.Lacey, M.Gribelyuk, C.Cabral, A.Steegen, V.Ku, R.Amos, Y.Li, P.Nguyen, F.McFeely, G.Singer, J.Cai, S.-H.Ku, Y.Y.Wang, C.Wajda, D.O’Meam, H.Shinriki, and T.Takahashi,
Ext. Abs. of SSDM,
2003.
2
International
"Strained Si MOSFETs on SiGe-on-Insulator (SGOI) for High Performance CMOS Technology"
K. Rim, B. H. Lee, A. Mocuta, K. Jenkins, S. Bedell, H. Chen, D. Sadana, M. Gribelyuk, J. Ott, K. Chan, L. Shi, J. Chu, D. Boyd, P. Mooney, P. O’Neil, and J. Welser,
Ext. Abs. of SSDM,
2003, Invited.
1
International
"Effect of surface preparation on high-k gate stack performance"
N. Moumen, J. Barnett, R.W. Murto, M. Gardner, B. H. Lee e, J.J. Peterson, G. Bersuker and H. R. Huff,
Proceedings of ECS symposium,
2003.
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