Conferences 9 페이지 | 포항공대 EESL

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Total 473건 9 페이지

2010
233

Domestic
"Simplified analytic model for the scaling limit of nano electro mechanical switch devices" H.J. Hwang, S.K. Lim, S.Y. Lee, C.H. Cho, B.H. Lee, 17th Korean Conference on Semiconductors (KCS), 2010.
232

International
"Extreme Low power Technology inspired by Biological Systems" B.H. Lee, Semicon Korea, 2010, invited.
2009
231

International
"A Novel Damage-Free High-k Etch Technique Using Neutral Beam Assisted Atomic Layer Etching (NBALE) for Sub-32nm Technology Node Low Power Metal Gate/High-k Dielectric CMOSFETs" K.S.Min, C.Y.Kang, C.Park, C.S.Park, B.J.Park, J.B. Park, M.Hussain, J.C.Lee, B.H.Lee, P.Kirsch, H.H. Tseng, R.Jammy, G.Y.Yeom, Proc. of Int. Elect. Dev. Meeting, 2009.

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230

International
"NEMS-CMOS hybrid technology and its applications" B.H.Lee, C.H.Cho, H.J.Hwang, S.K. Lim, S.Y. Lee, H.Hwang, NANO Korea, 2009, Invited.

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229

International
"Dipole model explaining high-k/metal gate field transistor threshold voltage tuning" P.D.Kirsch, P.Sivasubramani, J. Huang, C.D.Young, M. A. Quevedo-Lopoez, H. C.Wen, H. Alshareef, K. choi, C.S.Park, K.Freeman, M.M.Hussain, G.Bersuker, H.R.Harris, P. Majhi, R.Choi, P. Lysaght, B.H.Lee, H.-H Tseng, R.Jammy, T. S. Boscke, D. J. Lichtenwalne, Electrochem. Soc. Transaction, 19(1), p.269, 2009, Invited.

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228

International
"Dielectric Breakdown Characteristics of Stacked High-k Dielectrics" B.H.Lee, R.Choi, Electrochem. Soc. Transaction (ECS), San Francisco, 19(2), p.289, 2009, Invited.

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227

International
"Reliability characterization methods for MOSFETs with metal electrode/high-k dielectric stack" B.H.Lee, Proc. of ICICDT, 2009.
226

International
"Exploratory NEMS-CMOS Hybrid Devices for Post CMOS era" B.H.Lee, Proc. of ISTC, Electrochem. Soc. Transaction, 18(1), p.857, 2009, Invited.

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2008
225

International
"Device and Reliability Improvement of HfSiON+LaOx/Metal Gate Stacks for 22nm Node Application" J. Huang, P.D. Kirsch, D. Heh, C.Y. Kang, G. Bersuker, M. Hussain, P. Majhi, P. Sivasubramani, D.C. Gilmer, N. Goel, M.A. Quevedo-Lopez, C. Young, C.S. Park, C. Park, P. Y. Hung, J. Price, H.R. Harris, B .H. Lee, H.-H. Tseng, R. Jammy, Proc. of Int. Electron Device Meeting, p.45, 2008.

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224

International
"A Comprehensive and Comparative Study of Interface and Bulk Characteristics of nMOSETs with La-Incorporated High-k Dielectrics" W.-H. Choi, H.-M. Kwon*, I.-S. Han*, T.-G. Goo*, M.-K. Na*, C.Y. Kang, G. Bersuker, B.H. Lee, Y.H. Jeong, H.-D. Lee, R. Jammy, Proc. of Int. Electron Device Meeting, p.111, 2008.

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223

International
"Breakdown in the metal/high-k gate stack: Identifying the “weak link" in the multilayer dielectric" G. Bersuker, D. Heh, C. Young, H. Park, P. Khanal, L. Larcher, A. Padovani, P. Lenahan, J. Ryan, B. H. Lee, H. Tseng, R. Jammy, Proc. of Int. Electron Device Meeting, p.791, 2008.

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222

International
"The Impact of La-Doping on the Reliability of Low Vth High-k/Metal Gate nMOSFETs under Various Gate Stress Conditions" C.Y. Kang, C.D. Young, J. Huang, P. Kirsch, D. Heh, P. Sivasubramani, H.K. Park, G. Bersuker, B.H. Lee, H.S. Choi, K.T. Lee, Y-H. Jeong, J. Lichtenwalner, A.I. Kingon, H-H Tseng, R. Jammy, Proc. of Int. Electron Device Meeting, p.115, 2008.

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221

International
"Gate stack technology for nano-scale CMOS devices" B.H.Lee, C.S. Park, P. Kirsch, J. Huang, P. Sivasubramani, C.Burham, D.Gilmer, C.Y.Kang, P.Lysaght, G.Bersuker, P.Majhi, R.Harris, H.Tseng and R.Jammy, Int. MRS, Chongging, China, 2008, Invited.
220

International
"Mechanisms of Oxygen and Hydrogen Passivation using High Pressure Post-annealing Processes to Enhance the Performance of MOSFETs with Metal Gate/High-k Dielectric" C.Y. Kang, C.S.Park, H.K.Park, S.C.Song, .R.Choi, B.H.Park, B.Woo, K.T.Lee, J.Lee, H.Hwang, G.Bersuker, B.H.Lee, H.H.Tseng, R.Jammy, Ext. Abs. of Symp. On Solid State Device and Materials, p.22, 2008.
219

International
"Comparison of PECVD and RTCVD CESL Nitride stressor in reliability and performance improvement for high-k/metal gate CMOSFETs" K.T.Lee, C.Y.Kang, S.H.Hong, H.S.Choi, G.B.Choi, J.C.Kim, S.H.Song, R.H.Baek, M.S..Park, S.H..Sagong, S.W.Jung, H.K.Park, H.S.Hwang, B.H.Lee, Y.H.Jeong, Ext. Abs. of Symp. On Solid State Device and Materials, p.362, 2008.
218

International
"Gate stack technology for nano-scale CMOS devices" B.H.Lee, C.S. Park, P. Kirsch, J. Huang, P. Sivasubramani, C.Burham, D.Gilmer, C.Y.Kang, P.Lysaght, G.Bersuker, P.Majhi, R.Harris, H.Tseng and R.Jammy, IWDTF, Tokyo. Japan, 2008, Invited.
217

International
"Reliability characterization of metal electrode/high-k dielectric stacks for 45nm node beyond" B.H.Lee, G. Bersuker, D. Heh, H. Park, C.Y. Kang, C. Young, H. Tseng, Proc. of IWDTF, Tokyo. Japan, 2008, Invited.
216

International
"Mechanisms Limiting EOT Scaling and Gate Leakage Currents of High-k/Metal Gate Stacks Directly on SiGe and a Method to Enable Sub-1nm EOT" J. Huang, P.D. Kirsch, J. Oh, S.H. Lee, J. Price, P. Majhi, H.R. Harris, D.C. Gilmer, D.Q. Kelly, P. Sivasubramani, G. Bersuker, D. Heh, C. Young, C.S. Park, Y.N. Tan, N. Goel, C. Park, P.Y. Hung, P. Lysaght, K.J. Choi, B.J. Cho, H.-H. Tseng, B.H. Lee, R., Proc. Of Symp. On VLSI Technology, p.92, 2008.

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215

International
"The Effects Of Ge Composition And Si Cap Thickness On Hot Carrier Reliability Of Si/Si1-XGex/Si P-MOSFETS With High-K/Metal Gate" W.-Y. Loh, P. Majhi, S.-H. Lee, J.-W. Oh, B. Sassman, C. Young, G. Bersuker, B.-J. Cho, C.-S. Park, C.-Y. Kang, P. Kirsch, B.-H. Lee, H.R. Harris, H.-H. Tseng, R. Jammy, Proc. Of Symp. On VLSI Technology, p.56, 2008.

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214

International
"A comparative study of reliability and performance of strain engineering using CESL stressor and mechanical strain" K.T. Lee, C.Y. Kang, O.S. Yoo, C.D. Young, G. Bersuker, B.H. Lee, H.-D. Lee, Y.-H. Jeong, Proc. of IRPS, 2008.

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213

International
"Performance and Reliability characterization of the band edge high-k.metal gate MOSFETs withal-doped Hf-silicate gate dielectrics" C.Y. Kang, C.S. Park, D. Heh, C. Young, P. Kirsch, H.B. Park, G. Bersuker, J.-W.Yang, B.H. Lee. J.S.Jur, A.I. Kingon, R.Jammy, Proc. of Int. Rel. Phys. Symp., 2008.
212

International
"Plasma induced damage of aggressively scaled gate dielectric (EOT < 1.0 nm) in metal gate/high-k dielectric CMOSFETs" K.S. Min, C.Y. Kang, O.S. Yoo, B.J. Park, S.W. Kim, C.D. Young, D. Heh, G. Bersuker, B.H. Lee, G.Y. Yeom, Proc. of IRPS, 2008.

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211

International
"New hot-carrier degradation phenomenon in nano-scale floating body MOSFETs" J.-W. Yang, H.R.Harris, C.Y. Kang, C.D. Young, K.T. Lee, H.D. Lee, G. Bersuker, B.H. Lee, H.-H. Tseng, R. Jammy, Proc. of Int. Rel. Phys. Symp., 2008.

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210

International
"Achieving Low Vt ＜-0.3V and Thin EOT ~1.0nm in Gate First Metal/High-k pMOSFET for High Performance CMOS Applications" C. S. Park, G. Bersuker, S. C. Song, H. B. Park, C. Burham, B. S. Ju, C. Park, P. Kirsch, B. H. Lee and R. Jammy, Proc. of VLSI-TSA, 2008.

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209

International
"Physical Characteristics of HfO2 Dielectrics at the Physical Scaling Limit" P. S. Lysaght, J. C. Woicik, M. A. Sahiner, P. D. Kirsch, G. Bersuker, B.-H. Lee and R. Jammy, Proc. of VLSI-TSA, 2008.

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208

International
"Gate First Band Edge High-k/Metal Stacks with EOT=0.74nm for 22nm Node nFETs" J. Huang, P. D. Kirsch, M. Hussain, D. Heh, P. Sivasubramani, C. Young, D. C. Gilmer, C.S. Park, Y. N. Tan, C. Park, H.R. Harris, P. Majhi, G. Bersuker, B .H. Lee, H.-H. Tseng and R. Jammy, Proc. of VLSI-TSA, 2008.

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207

International
"Tunnel Oxide Dipole Engineering in TANOS Flash Memory for Fast Programming with Good Retention and Endurance" Y. N. Tan, H. C. Wen, C. Park, D. C. Gilmer, C. D. Young, D. Heh, P. Sivasubramani, J. Huang, P. Majhi, P. D. Kirsch, B. H. Lee, H. H. Tseng and R. Jammy, Proc. of VLSI-TSA, 2008.

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2007
206

International
"Achieving Band Edge Effective Work Function of Gate First Metal Gate by Oxygen Anneal Processes: Low Temperature Oxygen Anneal (LTOA) and High Pressure Oxygen Anneal (HPOA) Processes" Barnett, C. Y. Kang, P. Lysaght, G. Bersuker, R. Choi, H. K. Park, H. Hwang, B. H. Park, S. Kim, B. H. Lee, SSDM, 2007.
205

International
"PBTI Associated Hot Carrier Characteristics of Nano-scale NMOSFETs with Advanced Gate Stack of Metal Gate/High-k dielectrics" K. T. Lee, C. Y. Kang, R.Choi, S. C. Song, B. H. Lee, O. S. Yoo, H.-D. Lee, Y.-H. Jeong, SISC, 2007.
204

International
"Improved Flash Memory Program and Erase Window with TiO2 Charge Trap Layer and High Temperature Dopant Activation Anneal" Y. N. Tan, C. D. Young, D. Heh, C. Park , P. Sivasubramani, J. Huang, D. C. Gilmer, K. J. Choi, J. Kim, M. J. Kim, P. Majhi, R. Choi, P. D. Kirsch, B. H. Lee, H. H Tseng, R. Jammy, 4th Int. Symp. on Adv. Gate Stack Tech., 2007.

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