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게시판 검색
2002
4
International
"Performance enhancement on sub-70nm strained silic0on SOI MOSFETs on Ultra-thin Thermally Mixed Strained silicon/SiGe on Insulator(TM-SGOI) substrate with Raised S/D"
B.H. Lee, A. Mocuta, S. Bedell, H. Chen, D. Sadana, K. Rim, P. O’Neil, R. Mo, K. Chan, C. Cabral, C. Lavoie, D. Mocuta, A.Chakravarti, R.M.Mitchell, J. Mezzapelle, F. Jamin, M. Sendelbach, H.Kermel, M.Gribelyuk, A. Domenicucci, S.Narasimha, S.H. Ku, M. Ie,
Tech Dig. of Int. Electron Device Meetings,
2002, Late news paper.
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3
International
"Gate Postdoping to Decouple Implant/Anneal for Gate, Source/Drain, and Extension:Maximizing Polysilicon Gate Activation for 0.1 µm CMOS Technologies"
H. Park, D. Schepis, A.C. Mocuta, M. Khare, Y. Li, B. Doris, S. Shukla, T. Hughes, O. Dokumaci, S. Narasimha, S. Fung, J. Snare, B. H. Lee, J. Li, P. Ronsheim, A. Domenicucci, P. Varekamp, A. Ajmera, J. Sleight, P. O'Neil, E. Maciejewski, C. Lavoie,
Tech. Dig. of VLSI Symposium,
2002.
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2
International
"Mobility Enhancement in Strained Si NMOSFETs with HfO2 Gate Dielectrics"
K. Rim, E.P. Gusev, C. D’Emic, H. Chen, J. Chu, J. Ott, B. H. Lee, A. Mocuta, K. Chan, T. Kanarsky, D. Boyd, V. Mazzeo, M. Ieong, S.L. Cohen, H.-S. Wong,
Tech. Dig. of VLSI Symposium,
2002.
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1
International
"Strained Si CMOS (SS CMOS) Technology: Opportunities and Challenges"
K.Rim, R.Anderson, D. Boyd, F. Cardone, K. Chan, H. Chen, J. Chu, M. Hargrove, L. Huang, K. Jenkins, T. Kanarsky, S. Koester, B. H. Lee, K. Lee, V. Mazzeo, A. Mocuta, D. Mocuta, P. Mooney,P. Oldiges, J. Ott, P. Ronsheim, R. Roy, A. Steegen, M. Yang, H. Zh,
ULSI symposium,
2002.
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