Performance enhancement on sub-70nm strained silic0on SOI MOSFETs on Ultra-thin Thermally Mixed Strained silicon/SiGe on Insulator(TM-SGOI) substrate with Raised S/D
Conference
Tech Dig. of Int. Electron Device Meetings
Author
B.H. Lee, A. Mocuta, S. Bedell, H. Chen, D. Sadana, K. Rim, P. O’Neil, R. Mo, K. Chan, C. Cabral, C. Lavoie, D. Mocuta, A.Chakravarti, R.M.Mitchell, J. Mezzapelle, F. Jamin, M. Sendelbach, H.Kermel, M.Gribelyuk, A. Domenicucci, S.Narasimha, S.H. Ku, M. Ie
