목록 게시판 리스트 옵션 검색 Extreme Low Power Technology using Ternary Arithmetic Logic Circuits via Drastic Interconnect Length Reduction Conference IEEE International Symposium on Multiple-Valued Logic (ISMVL) Author Kiyung Kim, Sunmean Kim, Yongsu Lee, Daeyeon Kim, So-Young Kim, Seokhyeong Kang, Byoung Hun Lee* Year 2020 Date 2020 학회구분 International File 2020_ISMVL_Kiyung-Kim.pdf (1.6M) 4회 다운로드 DATE : 2021-04-04 14:13:53
